What is this “AlderLake-X”? ADL has now been launched – with AVX512 disabled: but, for the moment, it is possible to enable AVX512 on some boards; at least until the next microcode update. Some users have managed to benchmark ADL with AVX512 enabled (only big/P Cores enabled, LITTLE/E Atom cores … Read more…
What is “AlderLake”? It is the “next-generation” (12th) Core architecture – replacing the short-lived “RocketLake” (RKL) that finally replaced the many, many “Skylake” (SKL) derivative architectures (6th-10th). It is the 1st mainstream “hybrid” arch – i.e. combining big/P(erformant) “Core” cores with LITTLE/E(fficient) “Atom” cores in a single package. While in … Read more…
What is “AlderLake”? It is the “next-generation” (12th) Core architecture – replacing the short-lived “RocketLake” (RKL) that finally replaced the many, many “Skylake” (SKL) derivative architectures (6th-10th). It is the 1st mainstream “hybrid” arch – i.e. combining big/P(erformant) “Core” cores with LITTLE/E(fficient) “Atom” cores in a single package. While in … Read more…
Note: If you experience crashes (BSODs) with this or older versions, please upgrade to version R8. Note2: ARM64 support has shipped with the R9 release. We are pleased to release R7a (version 31.49) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release We are continuing to make … Read more…
We are pleased to release R6a (version 31.41) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release We are continuing to make improvements for hybrid (big/LITTLE) architectures – like Intel’s “Alder Lake” (ADL). In addition to detection, there are scheduling and benchmark optimisations that are ongoing. And … Read more…
We are pleased to release R5 (version 31.37) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release When we introduced the crypto-processor (TPM) benchmark and information module in Sandra 20/21 – we had no idea that just a few months later Microsoft would mandate its presence for … Read more…
We are pleased to release R3 (version 31.29) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release Hardware Support, Updates & Fixes All CPU Benchmarks: internal stability fixes; additional AVX512 optimisations. All GP-GPU Benchmarks: internal stability fixes; additional “Ampere” Ti optimisations. And please, don’t forget small ISVs … Read more…
Note: We have updated R2 with R2x to fix an OpenCL GP-GPU bug discovered by Mark Poppin. We are pleased to release R2x (version 31.25) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release Benchmark Support, Updates & Fixes CPU Scientific Benchmark: greatly improved AVX512 GEMM (SGEMM, … Read more…
What is “RocketLake”? It is the desktop/workstation version of the true “next generation” Core (gen 10+) architecture – finally replacing the ageing “Skylake (SKL)” arch and its many derivatives that are still with us (“CometLake (CML)”, etc.). It is a combination of the “IceLake (ICL)” CPU cores launched about a … Read more…
What is AVX512? AVX512 (Advanced Vector eXtensions) is the 512-bit SIMD instruction set that follows from previous 256-bit AVX2/FMA3/AVX instruction set. Originally introduced by Intel with its “Xeon Phi” GPGPU accelerators – albeit in a somewhat different form – it has finally made it to its desktop CPU lines with … Read more…
We are pleased to release R1X (version 31.20) update for Sandra 20/21 with the following changes: Sandra 20/21 Press Release Note: We have also back-ported most of the fixes to release R16x (version 30.120) update for Sandra 20/20 out now. Please update to this version of you are still using … Read more…
What is “RocketLake”? It is the desktop/workstation version of the true “next generation” Core (gen 10+) architecture – finally replacing the ageing “Skylake (SKL)” arch and its many derivatives that are still with us (“CometLake (CML)”, etc.). It is a combination of the “IceLake (ICL)” CPU cores launched about a … Read more…
What is “RocketLake”? It is the desktop/workstation version of the true “next generation” Core (gen 10+) architecture – finally replacing the ageing “Skylake (SKL)” arch and its many derivatives that are still with us (“CometLake (CML)”, etc.). It is a combination of the “IceLake (ICL)” CPU cores launched about a … Read more…
What is the “Processor Inter-Thread Efficiency” Benchmark? The “processor inter-thread efficiency” benchmark (ex. “multi-core Efficiency“) in SiSoftware Sandra has been specially designed to measure inter-thread/core/module/node/package communication efficiency of modern processors. It has been designed back in the days of the “Intel Pentium-D” (effectively two Pentium 4 in the same package) … Read more…
